Within each content area, there are one or more tutorials. Each tutorial consists of lessons. Each lesson should be a page detailing the concept being taught, along with sample code. Lesson and page ...
Abstract: Herein, we present a cyclic Vernier time-to-digital converter (TDC) using a pulse-shrinking inverter-assisted residue quantizer (IRQ). Previous pulse-shrinking techniques suffer from a ...
An 8.5-ps Two-Stage Vernier Delay-Line Loop Shrinking Time-to-Digital Converter in 130-nm Flash FPGA
Abstract: A new time-to-digital converter (TDC) with high resolution and high precision is designed and tested in this paper. The converter is realized by combining coarse clock counter with a ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback