Abstract: This paper presents an 8-bit 1.6GS/s successive-approximation-register analog-to-digital converter (SAR ADC) with alternate comparators. To enhance dynamic performance and speed, a ...
Abstract: This article presents a 72-GS/s 9-bit time-interleaved (TI) pipeline-successive approximation register successive approximation register (SAR) analog-to-digital converter (ADC) that achieves ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback