MIPS S8200 NPU is sampling now to lead customers developing autonomous edge transportation, robotics, and embedded platforms; ForwardEdge ASIC selects MIPS S8200 ...
Bao Yungang, vice director of the Chinese Academy of Sciences' Institute of Computing Technology and chief scientist at the Beijing Open Source Chip Academy, predicts RISC-V will become the world's ...
The companies have proposed a strategic partnership in which Ikarovec will continue to develop its IKAR-003 gene therapy using VectorBuilder's tech.
Elektor is seeking presentations for its online conference on RISC-V on April 15, 2026. The call for presentations is open ...
MIPS unveiled AI neural processor intellectual property based on RISC-V at CES, intended to support transformer and agentic language AI models at the edge.
As AI drives demand for advanced computing infrastructure, chip architectures are at a crossroads. While proprietary instruction set architectures (ISAs) like x86 and Arm dominate the market, their ...
The MIPS S8200 is a RISC-V neural processing unit designed to run transformer-based and agentic AI models directly on ...
IP that’s built on a RISC-V vector processing CPU. The platform has been augmented to support artificial-intelligence/machine ...
T2M-IP, a global semiconductor IP provider and ASIC services partner, today announced the global availability of its complete RISC-V CPU IP portfolio, spanning ultra-low-power MCU-class cores to ...
SAN JOSE, Calif., Dec. 16, 2025 /PRNewswire/ -- S2C, MachineWare, and Andes Technology today announced a collaborative co-emulation solution designed to address the increasing complexity of ...
Abstract: The on-chip processor of modern high-precision Global Navigation Satellite System (GNSS) receiver chips is required to perform signal processing and navigation computations for multiple ...
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