sv2v converts SystemVerilog (IEEE 1800-2017) to Verilog (IEEE 1364-2005), with an emphasis on supporting synthesizable language constructs. The primary goal of this project is to create a completely ...
Abstract: Accurate and rapid INS state initialization is crucial to ensure the performance of vehicular GNSS/INS integrated navigation. However, in typical urban environments (such as under viaducts ...
FST: Fast Signal Trace. This format is a block-based variant of IDX which is designed for very fast sequential and random access. FST has been designed to handle extremely large designs efficiently.
Abstract: We present a novel initialization technique for the range-aided simultaneous localization and mapping (RA-SLAM) problem. In RA-SLAM we consider measurements of point-to-point distances in ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results