IEEE

Design of high-precision FFT based on VHDL and analysis of code coverage

Abstract: This paper uses structured design to implement the floating-FFT by VHDL with ISE5.3 and simulates it by ModelSim. The data pathways in this project are in the form of 32-bit single precision ...
GitHub

HTL8254 82C54 Compatible Programmable Interval Timer IP core

The HTL8254 IP core is written in vendor neutral VHDL and as such can be simulated by any simulation tool. The testbench however uses Siemens’ Modelsim SignalSpy in order to provide a non-intrusive ...
IEEE

Design and simulation of digital frequency meter using VHDL

Abstract: The main aim of this paper is to design the digital frequency meter with frequency analyzing module. As a measuring frequency's instrument, the cymometer often refer to as electronic counter ...
GitHub

Stepper-Motor-Control with NIOS II/s and Cyclone IV/V - FPGA

This project is an example for a system-on-a-chip-design of a stepper-motor-control using the NIOS II/s Processor on the development boards from terasIC.