Electronic Design

Compiler Turns ANSI C Into Verilog

The C2R Compiler enables full-chip designs to be architected, verified, and implemented using ANSI C as the design language in a flow that is two to three times faster than using the traditional ...
Linux Journal

Icarus Verilog: Open-Source Verilog More Than a Year Later

About 16 months ago, in the February 2001 Linux Journal [see www.linuxjournal.com/article/4428], we reviewed the state of open source in electronic design automation ...
Semiconductor Engineering

C Level Design, Inc.

Provided C translation tools, including a C-to-Verilog compiler. C Level Design, Inc. went out of business in 2001. CycleC and other technology assets in 2001. C Level Design ceased operations in 2001 ...
Hackaday

Learning Verilog For FPGAs: The Tools And Building An Adder

Over the last year we’ve had several posts about the Lattice Semiconductor iCEstick which is shown below. The board looks like an overgrown USB stick with no case, but it is really an FPGA development ...
EDN

Speed compile/verification under Synopsys VCS

At the same time as the number of transistors on your average chip doubles every 18 months, the verification cycle has shrunk from 18 to 12 months, which in the near future will become as low as six ...